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| MRC | Criteria | Characteristic |
|---|---|---|
| SR-5 | THE MANUFACTURERS DATA | |
| TEXT | GENERAL CHARACTERISTICS ITEM DESCRIPTION | ANALYZE DIGITAL SIGNALS IN THE TIME ASYNCHRONOUS AND DATA SYNCHRONOUS DOMAIN UP TO 50 MHZ,54 DISPLAY INPUT CHANNELS,DUAL TIMEBASE TRIGGERING ACQUISITION AND DISPLAY,20 NS 50 MHZ TO 1 S 1 HZ INTERNAL CLOCK,14 SEPARATE TRIGGER LEVELS FOR EACH INPUT CHANNEL,TRIGGER DELAY OF 1 TO 9,999 SYSTEM CLOCKS OR EVENT OCCURANCES,FIXED TTL,ECLAND TPG AND VARIABLE LOGIC THRESHOLD,INTERNAL 512 BIT BY 54 CHANNEL,48 TO 440 HZ,SINGLE PHASE,O/A DIMENSIONS 19.600 IN. LG,14.500 IN. W,7.800 IN. H |
| SR-5 | DESIGN CONTROL REFERENCE | F5702A1 |
| SR-5 | MANUFACTURERS CODE | 80009 |
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