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MRC | Criteria | Characteristic |
---|---|---|
AEHX | MAXIMUM POWER DISSIPATION RATING | 76.0 MILLIWATTS |
AFGA | OPERATING TEMP RANGE | -0.0/+80.0 DEG CELSIUS |
CBBL | FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND HIGH SPEED |
CQSJ | INCLOSURE MATERIAL | CERAMIC |
CQSZ | INCLOSURE CONFIGURATION | FLAT PACK |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
CQZP | INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
CSSL | DESIGN FUNCTION AND QUANTITY | 2 GATE, NAND |
CWSG | TERMINAL SURFACE TREATMENT | SOLDER |
CZEN | VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS MAXIMUM POWER SOURCE |
CZEQ | TIME RATING PER CHACTERISTIC | 12.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 12.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
TEST | TEST DATA DOCUMENT | 05869-717129-520 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING D |
TTQY | TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
HL5-8-9 | HL5-01Z-0R100J | HL50-1-2 | HL50-02Z-3R6-5PCT |
HL50 10 11 | HL50 10 11 | HL5-50R00J | HL50-02Z-3R6J |
HL50-02Z-3R6J | HL50-10-10 | HL50-10-11 | HL5-8-9 |
HL50-10-10 | HL50 10 10 | HL50-02Z-3R6-5PCT | HL5-473D |
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