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NSN | FSC | NIIN | CLS | Hazmat | DEMIL | Cancelled NSN |
---|---|---|---|---|---|---|
5962-00-626-1805 Item Description: Microcircuit Digita | 5962 | 006261805 | 0 | N | B | |
CIIC | HCC | ESD | PMIC | Criticality | ENAC | |
U | A | 0 | ||||
Part Number | ISC | RNVC | RNCC | HCC | MSDS | SADC |
Tr1474 | 9 | 5 |
MRC | Criteria | Characteristic |
---|---|---|
ADAQ | BODY LENGTH | 0.660 INCHES MINIMUM AND 0.785 INCHES MAXIMUM |
ADAT | BODY WIDTH | 0.220 INCHES MINIMUM AND 0.280 INCHES MAXIMUM |
ADAU | BODY HEIGHT | 0.140 INCHES MINIMUM AND 0.180 INCHES MAXIMUM |
AEHX | MAXIMUM POWER DISSIPATION RATING | 200.0 MILLIWATTS |
AFGA | OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
AFJQ | STORAGE TEMP RANGE | -65.0/+150.0 DEG CELSIUS |
CBBL | FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND W/ENABLE AND POSITIVE OUTPUTS |
CQSJ | INCLOSURE MATERIAL | CERAMIC AND GLASS |
CQSZ | INCLOSURE CONFIGURATION | DUAL-IN-LINE |
CQWX | OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
CQZP | INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
CSSL | DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, J-K, CLOCKED AND 2 FLIP-FLOP, J-K, MASTER SLAVE |
CTFT | CASE OUTLINE SOURCE AND DESIGNATOR | T0-116 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
CZEQ | TIME RATING PER CHACTERISTIC | 25.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
TEST | TEST DATA DOCUMENT | 99380-0073-2097 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DR |
TR1-10-1545 | TR1-10-1515 | TR1-10-2705 | TR1-10-8225 |
TR1-10-1535 | TR1-10-7535 | TR1-10-4725 | TR1-10-1235 |
TR1-10-1235 | TR1-10-1235 | TR1-10-5605 | TR1-01 |
TR1-10-8225 | TR1-10-5115 | TR1-10-3335 | TR1-10-5645 |
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